More rfu documentation

This commit is contained in:
PikalaxALT
2020-02-01 15:34:33 -05:00
parent 4b017f8797
commit 08aafe093c
4 changed files with 553 additions and 519 deletions
+1 -1
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@@ -20,7 +20,7 @@ else
exit 1 exit 1
fi fi
OBJDUMP="$DEVKITARM/bin/arm-none-eabi-objdump -D -bbinary -marmv4t" OBJDUMP="$DEVKITARM/bin/arm-none-eabi-objdump -D -bbinary -marmv4t -Mforce-thumb"
OPTIONS="--start-address=$(($1)) --stop-address=$(($1 + $2))" OPTIONS="--start-address=$(($1)) --stop-address=$(($1 + $2))"
$OBJDUMP $OPTIONS ${baserom}.gba > ${baserom}.dump || exit 1 $OBJDUMP $OPTIONS ${baserom}.gba > ${baserom}.dump || exit 1
$OBJDUMP $OPTIONS poke${buildname}.gba > poke${buildname}.dump $OBJDUMP $OPTIONS poke${buildname}.gba > poke${buildname}.dump
+1 -13
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@@ -461,27 +461,15 @@ struct RfuStatic
u32 totalPacketSize; u32 totalPacketSize;
}; };
struct RfuSIO32Id
{
u8 unk0;
u8 unk1;
u16 unk2;
u16 unk4;
u16 unk6;
u16 unk8; // unused
u16 unkA;
};
extern struct STWIStatus *gSTWIStatus; extern struct STWIStatus *gSTWIStatus;
extern struct RfuLinkStatus *gRfuLinkStatus; extern struct RfuLinkStatus *gRfuLinkStatus;
extern struct RfuStatic *gRfuStatic; extern struct RfuStatic *gRfuStatic;
extern struct RfuFixed *gRfuFixed; extern struct RfuFixed *gRfuFixed;
extern struct RfuSlotStatusNI *gRfuSlotStatusNI[RFU_CHILD_MAX]; extern struct RfuSlotStatusNI *gRfuSlotStatusNI[RFU_CHILD_MAX];
extern struct RfuSlotStatusUNI *gRfuSlotStatusUNI[RFU_CHILD_MAX]; extern struct RfuSlotStatusUNI *gRfuSlotStatusUNI[RFU_CHILD_MAX];
extern struct RfuSIO32Id gRfuSIO32Id;
// librfu_s32id // librfu_s32id
s32 AgbRFU_checkID(u8); s32 AgbRFU_checkID(u8 maxTries);
// Arguments with "bm..." specify slots of the form (0x01 << slot number) that are the object of a function operation. // Arguments with "bm..." specify slots of the form (0x01 << slot number) that are the object of a function operation.
+485 -449
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File diff suppressed because it is too large Load Diff
+66 -56
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@@ -4,44 +4,56 @@ static void Sio32IDIntr(void);
static void Sio32IDInit(void); static void Sio32IDInit(void);
static s32 Sio32IDMain(void); static s32 Sio32IDMain(void);
struct RfuSIO32Id
{
u8 unk0;
u8 state;
u16 unk2;
u16 unk4;
u16 unk6;
u16 unk8; // unused
u16 lastId;
};
struct RfuSIO32Id gRfuSIO32Id; struct RfuSIO32Id gRfuSIO32Id;
static const u16 Sio32ConnectionData[] = { 0x494e, 0x544e, 0x4e45, 0x4f44 }; // NINTENDO static const u16 Sio32ConnectionData[] = { 0x494e, 0x544e, 0x4e45, 0x4f44 }; // NINTENDO
static const char Sio32IDLib_Var[] = "Sio32ID_030820"; static const char Sio32IDLib_Var[] = "Sio32ID_030820";
s32 AgbRFU_checkID(u8 r5) s32 AgbRFU_checkID(u8 maxTries)
{ {
u16 r8; u16 ieBak;
vu16 *r4; vu16 *regTMCNTL;
s32 r6; s32 id;
// Interrupts must be enabled
if (REG_IME == 0) if (REG_IME == 0)
return -1; return -1;
r8 = REG_IE; ieBak = REG_IE;
gSTWIStatus->state = 10; gSTWIStatus->state = 10;
STWI_set_Callback_ID(Sio32IDIntr); STWI_set_Callback_ID(Sio32IDIntr);
Sio32IDInit(); Sio32IDInit();
r4 = &REG_TMCNT_L(gSTWIStatus->timerSelect); regTMCNTL = &REG_TMCNT_L(gSTWIStatus->timerSelect);
r5 *= 8; maxTries *= 8;
while (--r5 != 0xFF) while (--maxTries != 0xFF)
{ {
r6 = Sio32IDMain(); id = Sio32IDMain();
if (r6 != 0) if (id != 0)
break; break;
r4[1] = 0; regTMCNTL[1] = 0;
r4[0] = 0; regTMCNTL[0] = 0;
r4[1] = TIMER_1024CLK | TIMER_ENABLE; regTMCNTL[1] = TIMER_1024CLK | TIMER_ENABLE;
while (r4[0] < 32) while (regTMCNTL[0] < 32)
; ;
r4[1] = 0; regTMCNTL[1] = 0;
r4[0] = 0; regTMCNTL[0] = 0;
} }
REG_IME = 0; REG_IME = 0;
REG_IE = r8; REG_IE = ieBak;
REG_IME = 1; REG_IME = 1;
gSTWIStatus->state = 0; gSTWIStatus->state = 0;
STWI_set_Callback_ID(NULL); STWI_set_Callback_ID(NULL);
return r6; return id;
} }
static void Sio32IDInit(void) static void Sio32IDInit(void)
@@ -58,107 +70,105 @@ static void Sio32IDInit(void)
static s32 Sio32IDMain(void) static s32 Sio32IDMain(void)
{ {
u8 r12; switch (gRfuSIO32Id.state)
switch (r12 = gRfuSIO32Id.unk1)
{ {
case 0: case 0:
gRfuSIO32Id.unk0 = 1; gRfuSIO32Id.unk0 = 1;
REG_SIOCNT |= SIO_38400_BPS; REG_SIOCNT |= SIO_38400_BPS;
REG_IME = r12; REG_IME = 0;
REG_IE |= INTR_FLAG_SERIAL; REG_IE |= INTR_FLAG_SERIAL;
REG_IME = 1; REG_IME = 1;
gRfuSIO32Id.unk1 = 1; gRfuSIO32Id.state = 1;
*(vu8 *)&REG_SIOCNT |= SIO_ENABLE; *(vu8 *)&REG_SIOCNT |= SIO_ENABLE;
break; break;
case 1: case 1:
if (gRfuSIO32Id.unkA == 0) if (gRfuSIO32Id.lastId == 0)
{ {
if (gRfuSIO32Id.unk0 == 1) if (gRfuSIO32Id.unk0 == 1)
{ {
if (gRfuSIO32Id.unk2 == 0) if (gRfuSIO32Id.unk2 == 0)
{ {
REG_IME = gRfuSIO32Id.unk2; REG_IME = 0;
REG_SIOCNT |= SIO_ENABLE; REG_SIOCNT |= SIO_ENABLE;
REG_IME = r12; REG_IME = 1;
} }
} }
else if (gRfuSIO32Id.unk4 != 0x8001 && !gRfuSIO32Id.unk2) else if (gRfuSIO32Id.unk4 != RFU_ID && !gRfuSIO32Id.unk2)
{ {
REG_IME = gRfuSIO32Id.unk2; REG_IME = 0;
REG_IE &= ~INTR_FLAG_SERIAL; REG_IE &= ~INTR_FLAG_SERIAL;
REG_IME = r12; REG_IME = 1;
REG_SIOCNT = gRfuSIO32Id.unk2; REG_SIOCNT = 0;
REG_SIOCNT = SIO_32BIT_MODE; REG_SIOCNT = SIO_32BIT_MODE;
REG_IF = INTR_FLAG_SERIAL; REG_IF = INTR_FLAG_SERIAL;
REG_SIOCNT |= SIO_INTR_ENABLE | SIO_ENABLE; REG_SIOCNT |= SIO_INTR_ENABLE | SIO_ENABLE;
REG_IME = gRfuSIO32Id.unk2; REG_IME = 0;
REG_IE |= INTR_FLAG_SERIAL; REG_IE |= INTR_FLAG_SERIAL;
REG_IME = r12; REG_IME = 1;
} }
break; break;
} }
else else
{ {
gRfuSIO32Id.unk1 = 2; gRfuSIO32Id.state = 2;
// fallthrough // fallthrough
} }
default: default:
return gRfuSIO32Id.unkA; return gRfuSIO32Id.lastId;
} }
return 0; return 0;
} }
static void Sio32IDIntr(void) static void Sio32IDIntr(void)
{ {
u32 r5; u32 regSIODATA32;
u16 r0; u16 delay;
#ifndef NONMATCHING #ifndef NONMATCHING
register u32 r1 asm("r1"); register u32 rfuSIO32IdUnk0_times_16 asm("r1");
register u16 r0_ asm("r0"); register u16 negRfuSIO32IdUnk6 asm("r0");
#else #else
u32 r1; u32 rfuSIO32IdUnk0_times_16;
u16 r0_; u16 negRfuSIO32IdUnk6;
#endif #endif
r5 = REG_SIODATA32; regSIODATA32 = REG_SIODATA32;
if (gRfuSIO32Id.unk0 != 1) if (gRfuSIO32Id.unk0 != 1)
REG_SIOCNT |= SIO_ENABLE; REG_SIOCNT |= SIO_ENABLE;
r1 = 16 * gRfuSIO32Id.unk0; // to handle side effect of inline asm rfuSIO32IdUnk0_times_16 = 16 * gRfuSIO32Id.unk0; // to handle side effect of inline asm
r1 = (r5 << r1) >> 16; rfuSIO32IdUnk0_times_16 = (regSIODATA32 << rfuSIO32IdUnk0_times_16) >> 16;
r5 = (r5 << 16 * (1 - gRfuSIO32Id.unk0)) >> 16; regSIODATA32 = (regSIODATA32 << 16 * (1 - gRfuSIO32Id.unk0)) >> 16;
if (gRfuSIO32Id.unkA == 0) if (gRfuSIO32Id.lastId == 0)
{ {
if (r1 == gRfuSIO32Id.unk6) if (rfuSIO32IdUnk0_times_16 == gRfuSIO32Id.unk6)
{ {
if (gRfuSIO32Id.unk2 > 3) if (gRfuSIO32Id.unk2 > 3)
{ {
gRfuSIO32Id.unkA = r5; gRfuSIO32Id.lastId = regSIODATA32;
} }
else if (r1 == (u16)~gRfuSIO32Id.unk4) else if (rfuSIO32IdUnk0_times_16 == (u16)~gRfuSIO32Id.unk4)
{ {
r0_ = ~gRfuSIO32Id.unk6; negRfuSIO32IdUnk6 = ~gRfuSIO32Id.unk6;
if (r5 == r0_) if (regSIODATA32 == negRfuSIO32IdUnk6)
++gRfuSIO32Id.unk2; ++gRfuSIO32Id.unk2;
} }
} }
else else
{ {
gRfuSIO32Id.unk2 = gRfuSIO32Id.unkA; gRfuSIO32Id.unk2 = gRfuSIO32Id.lastId;
} }
} }
if (gRfuSIO32Id.unk2 < 4) if (gRfuSIO32Id.unk2 < 4)
gRfuSIO32Id.unk4 = *(gRfuSIO32Id.unk2 + Sio32ConnectionData); gRfuSIO32Id.unk4 = *(gRfuSIO32Id.unk2 + Sio32ConnectionData);
else else
gRfuSIO32Id.unk4 = 0x8001; gRfuSIO32Id.unk4 = RFU_ID;
gRfuSIO32Id.unk6 = ~r5; gRfuSIO32Id.unk6 = ~regSIODATA32;
REG_SIODATA32 = (gRfuSIO32Id.unk4 << 16 * (1 - gRfuSIO32Id.unk0)) REG_SIODATA32 = (gRfuSIO32Id.unk4 << 16 * (1 - gRfuSIO32Id.unk0))
+ (gRfuSIO32Id.unk6 << 16 * gRfuSIO32Id.unk0); + (gRfuSIO32Id.unk6 << 16 * gRfuSIO32Id.unk0);
if (gRfuSIO32Id.unk0 == 1 && (gRfuSIO32Id.unk2 || r5 == 0x494E)) if (gRfuSIO32Id.unk0 == 1 && (gRfuSIO32Id.unk2 || regSIODATA32 == 0x494e))
{ {
for (r0 = 0; r0 < 600; ++r0) for (delay = 0; delay < 600; ++delay)
; ;
if (gRfuSIO32Id.unkA == 0) if (gRfuSIO32Id.lastId == 0)
REG_SIOCNT |= SIO_ENABLE; REG_SIOCNT |= SIO_ENABLE;
} }
} }