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fix librfu_intr fakematching (port from emerald)

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Kurausukun
2021-04-20 22:21:20 -04:00
parent 3f2fc649f2
commit 576e63fd0a
1 changed files with 7 additions and 7 deletions
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src/librfu_intr.c
+7 -7
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@@ -147,11 +147,7 @@ static void sio32intr_clock_slave(void)
{ {
u32 regSIODATA32; u32 regSIODATA32;
u32 r0; u32 r0;
#ifndef NONMATCHING u32 reqLen;
register u32 reqLen asm("r2");
#else
u32 reqLen;
#endif
gSTWIStatus->timerActive = 0; gSTWIStatus->timerActive = 0;
STWI_set_timer_in_RAM(100); STWI_set_timer_in_RAM(100);
@@ -164,10 +160,14 @@ static void sio32intr_clock_slave(void)
((u32*)gSTWIStatus->rxPacket)[0] = regSIODATA32; ((u32*)gSTWIStatus->rxPacket)[0] = regSIODATA32;
gSTWIStatus->reqNext = 1; gSTWIStatus->reqNext = 1;
r0 = 0x99660000; r0 = 0x99660000;
if ((regSIODATA32 >> 16) == (r0 >> 16)) // variable reuse required
reqLen = (regSIODATA32 >> 16);
if (reqLen == (r0 >> 16))
{ {
// only reqLen = regSIODATA32 >> 8 is required to match, but it looks a bit
// more consistent when both lines update the variables. Might have been a macro?
gSTWIStatus->reqLength = reqLen = regSIODATA32 >> 8; gSTWIStatus->reqLength = reqLen = regSIODATA32 >> 8;
gSTWIStatus->reqActiveCommand = regSIODATA32; gSTWIStatus->reqActiveCommand = reqLen = (regSIODATA32 >> 0);
if (gSTWIStatus->reqLength == 0) if (gSTWIStatus->reqLength == 0)
{ {
if ( if (