slot_machine nonmatching sub_81406E8
Register allocation differences
This commit is contained in:
PikalaxALT
+421
-2
@@ -67,8 +67,68 @@ void sub_8141148(u16 a0, u8 a1);
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bool32 sub_8141180(u8 a0);
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void sub_8141C30(u8, u8);
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extern const u8 gUnknown_8464890[][2];
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extern const u8 gUnknown_8464926[][21];
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const u8 gUnknown_8464890[][2] = {
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{0x00, 0x03},
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{0x00, 0x06},
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{0x03, 0x06},
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{0x01, 0x04},
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{0x01, 0x07},
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{0x04, 0x07},
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{0x02, 0x05},
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{0x02, 0x08},
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{0x05, 0x08},
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{0x00, 0x04},
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{0x00, 0x08},
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{0x04, 0x08},
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{0x02, 0x04},
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{0x02, 0x06},
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{0x04, 0x06}
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};
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const u8 gUnknown_84648AE[][3] = {
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{0x00, 0x03, 0x06}, // top row
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{0x01, 0x04, 0x07}, // middle row
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{0x02, 0x05, 0x08}, // bottom row
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{0x00, 0x04, 0x08}, // tl-br
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{0x02, 0x04, 0x06} // bl-tr
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};
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const u8 gUnknown_84648BD[][4] = {
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{0x00, 0x04, 0x08, 0x03},
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{0x00, 0x03, 0x06, 0x02},
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{0x01, 0x04, 0x07, 0x01},
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{0x02, 0x05, 0x08, 0x02},
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{0x02, 0x04, 0x06, 0x03}
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};
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const u16 gUnknown_84648D2[][7] = {
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{0x1fa1, 0x2eab, 0x3630, 0x39f3, 0x3bd4, 0x3bfc, 0x0049},
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{0x1f97, 0x2ea2, 0x3627, 0x39e9, 0x3bca, 0x3bf8, 0x0049},
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{0x1f91, 0x2e9b, 0x3620, 0x39e3, 0x3bc4, 0x3bf4, 0x0049},
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{0x1f87, 0x2e92, 0x3617, 0x39d9, 0x3bba, 0x3bef, 0x0050},
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{0x1f7f, 0x2e89, 0x360e, 0x39d1, 0x3bb2, 0x3bea, 0x0050},
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{0x1fc9, 0x2efc, 0x3696, 0x3a63, 0x3c49, 0x3c8b, 0x0073},
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};
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const u8 gUnknown_8464926[][21] = {
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{0x00, 0x03, 0x04, 0x01, 0x02, 0x06, 0x02, 0x05, 0x00, 0x06, 0x03, 0x01, 0x04, 0x02, 0x06, 0x00, 0x05, 0x02, 0x01, 0x06, 0x02},
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{0x00, 0x05, 0x04, 0x03, 0x01, 0x05, 0x04, 0x03, 0x02, 0x05, 0x04, 0x03, 0x00, 0x05, 0x04, 0x01, 0x03, 0x06, 0x05, 0x03, 0x04},
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{0x00, 0x03, 0x06, 0x05, 0x02, 0x03, 0x06, 0x05, 0x02, 0x03, 0x05, 0x06, 0x02, 0x03, 0x05, 0x06, 0x02, 0x03, 0x05, 0x06, 0x01},
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};
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const u16 gUnknown_8464966[] = {
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0,
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2,
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6,
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8,
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15,
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100,
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300
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};
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void PlaySlotMachine(u16 machineIdx, MainCallback savedCallback)
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{
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@@ -776,3 +836,362 @@ bool32 sub_814054C(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4)
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}
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return FALSE;
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}
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#ifdef NONMATCHING
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bool32 sub_81406E8(s32 a0, s32 a1, s32 a2)
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{
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u8 sp0[9];
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s32 r3, r6;
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s32 i;
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r6 = sSlotMachineState->field_20[sSlotMachineState->field_32[0]] + 1;
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r3 = sSlotMachineState->field_20[sSlotMachineState->field_32[1]] + 1;
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a1++;
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if (r6 >= 21)
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r6 = 0;
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if (r3 >= 21)
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r3 = 0;
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if (a1 >= 21)
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a1 = 0;
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for (i = 0; i < 3; i++)
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{
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sp0[sSlotMachineState->field_32[0] * 3 + i] = gUnknown_8464926[sSlotMachineState->field_32[0]][r6];
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sp0[sSlotMachineState->field_32[1] * 3 + i] = gUnknown_8464926[sSlotMachineState->field_32[1]][r3];
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sp0[a0 * 3 + i] = gUnknown_8464926[a0][a1];
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r6++;
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if (r6 >= 21)
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r6 = 0;
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r3++;
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if (r3 >= 21)
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r3 = 0;
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a1++;
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if (a1 >= 21)
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a1++;
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}
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switch (a2)
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{
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case 0:
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for (i = 0; i < 3; i++)
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{
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if (sub_81408F4(1, sp0[i]))
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return FALSE;
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}
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for (i = 0; i < 5; i++)
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{
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if (sp0[gUnknown_84648AE[i][0]] == sp0[gUnknown_84648AE[i][1]] && sp0[gUnknown_84648AE[i][0]] == sp0[gUnknown_84648AE[i][2]])
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return FALSE;
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}
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return TRUE;
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case 1:
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for (i = 0; i < 5; i++)
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{
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if (sp0[gUnknown_84648AE[i][0]] == sp0[gUnknown_84648AE[i][1]] && sub_81408F4(a2, sp0[gUnknown_84648AE[i][0]]))
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return FALSE;
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}
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for (i = 0; i < 3; i++)
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{
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if (sub_81408F4(a2, sp0[i]))
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return TRUE;
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}
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return FALSE;
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case 2:
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for (i = 0; i < 5; i++)
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{
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if (sp0[gUnknown_84648AE[i][0]] == sp0[gUnknown_84648AE[i][1]] && sub_81408F4(a2, sp0[gUnknown_84648AE[i][0]]))
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return TRUE;
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}
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return FALSE;
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}
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for (i = 0; i < 5; i++)
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{
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if (sp0[gUnknown_84648AE[i][0]] == sp0[gUnknown_84648AE[i][1]] && sp0[gUnknown_84648AE[i][0]] == sp0[gUnknown_84648AE[i][2]] && sub_81408F4(a2, sp0[gUnknown_84648AE[i][0]]))
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return TRUE;
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}
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return FALSE;
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}
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#else
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NAKED
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bool32 sub_81406E8(s32 a0, s32 a1, s32 a2)
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{
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asm_unified("\tpush {r4-r7,lr}\n"
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"\tmov r7, r10\n"
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"\tmov r6, r9\n"
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"\tmov r5, r8\n"
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"\tpush {r5-r7}\n"
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"\tsub sp, 0x10\n"
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"\tadds r7, r0, 0\n"
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"\tadds r5, r1, 0\n"
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"\tmov r8, r2\n"
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"\tldr r0, _081407C8 @ =sSlotMachineState\n"
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"\tldr r2, [r0]\n"
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"\tmovs r1, 0x32\n"
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"\tldrsh r0, [r2, r1]\n"
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"\tlsls r0, 1\n"
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"\tadds r1, r2, 0\n"
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"\tadds r1, 0x20\n"
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"\tadds r0, r1, r0\n"
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"\tmovs r3, 0\n"
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"\tldrsh r0, [r0, r3]\n"
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"\tadds r6, r0, 0x1\n"
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"\tmovs r3, 0x34\n"
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"\tldrsh r0, [r2, r3]\n"
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"\tlsls r0, 1\n"
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"\tadds r1, r0\n"
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"\tmovs r3, 0\n"
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"\tldrsh r0, [r1, r3]\n"
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"\tadds r3, r0, 0x1\n"
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"\tadds r5, 0x1\n"
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"\tcmp r6, 0x14\n"
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"\tble _08140726\n"
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"\tmovs r6, 0\n"
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"_08140726:\n"
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"\tcmp r3, 0x14\n"
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"\tble _0814072C\n"
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"\tmovs r3, 0\n"
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"_0814072C:\n"
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"\tcmp r5, 0x14\n"
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"\tble _08140732\n"
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"\tmovs r5, 0\n"
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"_08140732:\n"
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"\tmovs r4, 0\n"
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"\tlsls r1, r7, 1\n"
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"\tlsls r0, r7, 2\n"
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"\tmov r9, r2\n"
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"\tldr r2, _081407CC @ =gUnknown_8464926\n"
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"\tmov r10, r2\n"
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"\tadds r1, r7\n"
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"\tadd r1, sp\n"
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"\tmov r12, r1\n"
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"\tadds r0, r7\n"
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"\tlsls r0, 2\n"
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"\tadds r0, r7\n"
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"\tstr r0, [sp, 0xC]\n"
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"_0814074C:\n"
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"\tmov r7, r9\n"
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"\tmovs r0, 0x32\n"
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"\tldrsh r1, [r7, r0]\n"
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"\tlsls r0, r1, 1\n"
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"\tadds r0, r1\n"
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"\tadds r0, r4\n"
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"\tmov r7, sp\n"
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"\tadds r2, r7, r0\n"
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"\tlsls r0, r1, 2\n"
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"\tadds r0, r1\n"
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"\tlsls r0, 2\n"
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"\tadds r0, r1\n"
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"\tadds r0, r6, r0\n"
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"\tadd r0, r10\n"
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"\tldrb r0, [r0]\n"
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"\tstrb r0, [r2]\n"
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"\tmov r0, r9\n"
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"\tmovs r2, 0x34\n"
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"\tldrsh r1, [r0, r2]\n"
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"\tlsls r0, r1, 1\n"
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"\tadds r0, r1\n"
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"\tadds r0, r4\n"
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"\tadds r2, r7, r0\n"
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"\tlsls r0, r1, 2\n"
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"\tadds r0, r1\n"
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"\tlsls r0, 2\n"
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"\tadds r0, r1\n"
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"\tadds r0, r3, r0\n"
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"\tadd r0, r10\n"
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"\tldrb r0, [r0]\n"
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"\tstrb r0, [r2]\n"
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"\tldr r7, [sp, 0xC]\n"
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"\tadds r0, r5, r7\n"
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"\tadd r0, r10\n"
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"\tldrb r0, [r0]\n"
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"\tmov r1, r12\n"
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"\tstrb r0, [r1]\n"
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"\tadds r6, 0x1\n"
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"\tcmp r6, 0x14\n"
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"\tble _0814079E\n"
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"\tmovs r6, 0\n"
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"_0814079E:\n"
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"\tadds r3, 0x1\n"
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"\tcmp r3, 0x14\n"
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"\tble _081407A6\n"
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"\tmovs r3, 0\n"
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"_081407A6:\n"
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"\tadds r5, 0x1\n"
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"\tcmp r5, 0x14\n"
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"\tble _081407AE\n"
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"\tmovs r5, 0\n"
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"_081407AE:\n"
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"\tmovs r2, 0x1\n"
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"\tadd r12, r2\n"
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"\tadds r4, 0x1\n"
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"\tcmp r4, 0x2\n"
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"\tble _0814074C\n"
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"\tmov r3, r8\n"
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"\tcmp r3, 0x1\n"
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"\tbeq _08140828\n"
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"\tcmp r3, 0x1\n"
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"\tbgt _081407D0\n"
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"\tcmp r3, 0\n"
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"\tbeq _081407D8\n"
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"\tb _081408A0\n"
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"\t.align 2, 0\n"
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"_081407C8: .4byte sSlotMachineState\n"
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"_081407CC: .4byte gUnknown_8464926\n"
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"_081407D0:\n"
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"\tmov r6, r8\n"
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"\tcmp r6, 0x2\n"
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"\tbeq _08140870\n"
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"\tb _081408A0\n"
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"_081407D8:\n"
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"\tmovs r4, 0\n"
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"_081407DA:\n"
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"\tmov r7, sp\n"
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"\tadds r0, r7, r4\n"
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"\tldrb r1, [r0]\n"
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"\tmovs r0, 0x1\n"
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"\tbl sub_81408F4\n"
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"\tcmp r0, 0\n"
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"\tbne _081408DC_return_false\n"
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"\tadds r4, 0x1\n"
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"\tcmp r4, 0x2\n"
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"\tble _081407DA\n"
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"\tmovs r4, 0\n"
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"\tldr r2, _08140824 @ =gUnknown_84648AE\n"
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"\tmovs r3, 0\n"
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"\tadds r5, r2, 0x2\n"
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"_081407F8:\n"
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"\tldrb r0, [r2]\n"
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"\tmov r6, sp\n"
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"\tadds r1, r6, r0\n"
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"\tldrb r0, [r2, 0x1]\n"
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"\tadd r0, sp\n"
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"\tldrb r1, [r1]\n"
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"\tldrb r0, [r0]\n"
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"\tcmp r1, r0\n"
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"\tbne _08140816\n"
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"\tadds r0, r3, r5\n"
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"\tldrb r0, [r0]\n"
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"\tadd r0, sp\n"
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"\tldrb r0, [r0]\n"
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"\tcmp r1, r0\n"
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"\tbeq _081408DC_return_false\n"
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"_08140816:\n"
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"\tadds r2, 0x3\n"
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"\tadds r3, 0x3\n"
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"\tadds r4, 0x1\n"
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"\tcmp r4, 0x4\n"
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"\tble _081407F8\n"
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"_08140820_return_true:\n"
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"\tmovs r0, 0x1\n"
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"\tb _081408DE\n"
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"\t.align 2, 0\n"
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"_08140824: .4byte gUnknown_84648AE\n"
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"_08140828:\n"
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"\tmovs r4, 0\n"
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"\tldr r5, _0814086C @ =gUnknown_84648AE\n"
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"_0814082C:\n"
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"\tldrb r0, [r5]\n"
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"\tmov r7, sp\n"
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"\tadds r2, r7, r0\n"
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"\tldrb r0, [r5, 0x1]\n"
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"\tadds r1, r7, r0\n"
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"\tldrb r0, [r2]\n"
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"\tldrb r1, [r1]\n"
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"\tcmp r0, r1\n"
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"\tbne _0814084A\n"
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"\tadds r1, r0, 0\n"
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"\tmov r0, r8\n"
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"\tbl sub_81408F4\n"
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"\tcmp r0, 0\n"
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"\tbne _081408DC_return_false\n"
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"_0814084A:\n"
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"\tadds r5, 0x3\n"
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"\tadds r4, 0x1\n"
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"\tcmp r4, 0x4\n"
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"\tble _0814082C\n"
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"\tmovs r4, 0\n"
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"_08140854:\n"
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"\tmov r1, sp\n"
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"\tadds r0, r1, r4\n"
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"\tldrb r1, [r0]\n"
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"\tmov r0, r8\n"
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"\tbl sub_81408F4\n"
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"\tcmp r0, 0\n"
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"\tbne _08140820_return_true\n"
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"\tadds r4, 0x1\n"
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"\tcmp r4, 0x2\n"
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"\tble _08140854\n"
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"\tb _081408DC_return_false\n"
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"\t.align 2, 0\n"
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"_0814086C: .4byte gUnknown_84648AE\n"
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"_08140870:\n"
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"\tmovs r4, 0\n"
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"\tldr r5, _0814089C @ =gUnknown_84648AE\n"
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"_08140874:\n"
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"\tldrb r0, [r5]\n"
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"\tmov r3, sp\n"
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"\tadds r2, r3, r0\n"
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"\tldrb r0, [r5, 0x1]\n"
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"\tadds r1, r3, r0\n"
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"\tldrb r0, [r2]\n"
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"\tldrb r1, [r1]\n"
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"\tcmp r0, r1\n"
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"\tbne _08140892\n"
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"\tadds r1, r0, 0\n"
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"\tmov r0, r8\n"
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"\tbl sub_81408F4\n"
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"\tcmp r0, 0\n"
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"\tbne _08140820_return_true\n"
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"_08140892:\n"
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"\tadds r5, 0x3\n"
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"\tadds r4, 0x1\n"
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"\tcmp r4, 0x4\n"
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"\tble _08140874\n"
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"\tb _081408DC_return_false\n"
|
||||
"\t.align 2, 0\n"
|
||||
"_0814089C: .4byte gUnknown_84648AE\n"
|
||||
"_081408A0:\n"
|
||||
"\tmovs r4, 0\n"
|
||||
"\tldr r5, _081408F0 @ =gUnknown_84648AE\n"
|
||||
"\tadds r7, r5, 0\n"
|
||||
"\tmovs r6, 0\n"
|
||||
"_081408A8:\n"
|
||||
"\tldrb r0, [r5]\n"
|
||||
"\tmov r1, sp\n"
|
||||
"\tadds r2, r1, r0\n"
|
||||
"\tadds r0, r7, 0x1\n"
|
||||
"\tadds r0, r6, r0\n"
|
||||
"\tldrb r0, [r0]\n"
|
||||
"\tadd r0, sp\n"
|
||||
"\tldrb r1, [r2]\n"
|
||||
"\tldrb r0, [r0]\n"
|
||||
"\tcmp r1, r0\n"
|
||||
"\tbne _081408D2\n"
|
||||
"\tldrb r0, [r5, 0x2]\n"
|
||||
"\tadd r0, sp\n"
|
||||
"\tldrb r0, [r0]\n"
|
||||
"\tcmp r1, r0\n"
|
||||
"\tbne _081408D2\n"
|
||||
"\tmov r0, r8\n"
|
||||
"\tbl sub_81408F4\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _08140820_return_true\n"
|
||||
"_081408D2:\n"
|
||||
"\tadds r5, 0x3\n"
|
||||
"\tadds r6, 0x3\n"
|
||||
"\tadds r4, 0x1\n"
|
||||
"\tcmp r4, 0x4\n"
|
||||
"\tble _081408A8\n"
|
||||
"_081408DC_return_false:\n"
|
||||
"\tmovs r0, 0\n"
|
||||
"_081408DE:\n"
|
||||
"\tadd sp, 0x10\n"
|
||||
"\tpop {r3-r5}\n"
|
||||
"\tmov r8, r3\n"
|
||||
"\tmov r9, r4\n"
|
||||
"\tmov r10, r5\n"
|
||||
"\tpop {r4-r7}\n"
|
||||
"\tpop {r1}\n"
|
||||
"\tbx r1\n"
|
||||
"\t.align 2, 0\n"
|
||||
"_081408F0: .4byte gUnknown_84648AE");
|
||||
}
|
||||
#endif //NONMATCHING
|
||||
|
||||
Reference in New Issue
Block a user