Document intro functions

This commit is contained in:
GriffinR
2022-09-23 15:42:53 -04:00
parent 27b2b0b24a
commit fa9808f79d
6 changed files with 1168 additions and 916 deletions
+92 -92
View File
@@ -600,58 +600,58 @@ u32 ChangeBgX(u8 bg, u32 value, u8 op)
switch (op)
{
case 0:
default:
sGpuBgConfigs2[bg].bg_x = value;
break;
case 1:
sGpuBgConfigs2[bg].bg_x += value;
break;
case 2:
sGpuBgConfigs2[bg].bg_x -= value;
break;
case BG_COORD_SET:
default:
sGpuBgConfigs2[bg].bg_x = value;
break;
case BG_COORD_ADD:
sGpuBgConfigs2[bg].bg_x += value;
break;
case BG_COORD_SUB:
sGpuBgConfigs2[bg].bg_x -= value;
break;
}
mode = GetBgMode();
switch (bg)
{
case 0:
temp1 = sGpuBgConfigs2[0].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG0HOFS, temp1);
break;
case 1:
temp1 = sGpuBgConfigs2[1].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG1HOFS, temp1);
break;
case 2:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[2].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG2HOFS, temp1);
}
else
{
temp1 = sGpuBgConfigs2[2].bg_x >> 0x10;
temp2 = sGpuBgConfigs2[2].bg_x & 0xFFFF;
SetGpuReg(REG_OFFSET_BG2X_H, temp1);
SetGpuReg(REG_OFFSET_BG2X_L, temp2);
}
break;
case 3:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[3].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG3HOFS, temp1);
}
else if (mode == 2)
{
temp1 = sGpuBgConfigs2[3].bg_x >> 0x10;
temp2 = sGpuBgConfigs2[3].bg_x & 0xFFFF;
SetGpuReg(REG_OFFSET_BG3X_H, temp1);
SetGpuReg(REG_OFFSET_BG3X_L, temp2);
}
break;
case 0:
temp1 = sGpuBgConfigs2[0].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG0HOFS, temp1);
break;
case 1:
temp1 = sGpuBgConfigs2[1].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG1HOFS, temp1);
break;
case 2:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[2].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG2HOFS, temp1);
}
else
{
temp1 = sGpuBgConfigs2[2].bg_x >> 0x10;
temp2 = sGpuBgConfigs2[2].bg_x & 0xFFFF;
SetGpuReg(REG_OFFSET_BG2X_H, temp1);
SetGpuReg(REG_OFFSET_BG2X_L, temp2);
}
break;
case 3:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[3].bg_x >> 0x8;
SetGpuReg(REG_OFFSET_BG3HOFS, temp1);
}
else if (mode == 2)
{
temp1 = sGpuBgConfigs2[3].bg_x >> 0x10;
temp2 = sGpuBgConfigs2[3].bg_x & 0xFFFF;
SetGpuReg(REG_OFFSET_BG3X_H, temp1);
SetGpuReg(REG_OFFSET_BG3X_L, temp2);
}
break;
}
return sGpuBgConfigs2[bg].bg_x;
@@ -679,58 +679,58 @@ u32 ChangeBgY(u8 bg, u32 value, u8 op)
switch (op)
{
case 0:
default:
sGpuBgConfigs2[bg].bg_y = value;
break;
case 1:
sGpuBgConfigs2[bg].bg_y += value;
break;
case 2:
sGpuBgConfigs2[bg].bg_y -= value;
break;
case BG_COORD_SET:
default:
sGpuBgConfigs2[bg].bg_y = value;
break;
case BG_COORD_ADD:
sGpuBgConfigs2[bg].bg_y += value;
break;
case BG_COORD_SUB:
sGpuBgConfigs2[bg].bg_y -= value;
break;
}
mode = GetBgMode();
switch (bg)
{
case 0:
temp1 = sGpuBgConfigs2[0].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG0VOFS, temp1);
break;
case 1:
temp1 = sGpuBgConfigs2[1].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG1VOFS, temp1);
break;
case 2:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[2].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG2VOFS, temp1);
}
else
{
temp1 = sGpuBgConfigs2[2].bg_y >> 0x10;
temp2 = sGpuBgConfigs2[2].bg_y & 0xFFFF;
SetGpuReg(REG_OFFSET_BG2Y_H, temp1);
SetGpuReg(REG_OFFSET_BG2Y_L, temp2);
}
break;
case 3:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[3].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG3VOFS, temp1);
}
else if (mode == 2)
{
temp1 = sGpuBgConfigs2[3].bg_y >> 0x10;
temp2 = sGpuBgConfigs2[3].bg_y & 0xFFFF;
SetGpuReg(REG_OFFSET_BG3Y_H, temp1);
SetGpuReg(REG_OFFSET_BG3Y_L, temp2);
}
break;
case 0:
temp1 = sGpuBgConfigs2[0].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG0VOFS, temp1);
break;
case 1:
temp1 = sGpuBgConfigs2[1].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG1VOFS, temp1);
break;
case 2:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[2].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG2VOFS, temp1);
}
else
{
temp1 = sGpuBgConfigs2[2].bg_y >> 0x10;
temp2 = sGpuBgConfigs2[2].bg_y & 0xFFFF;
SetGpuReg(REG_OFFSET_BG2Y_H, temp1);
SetGpuReg(REG_OFFSET_BG2Y_L, temp2);
}
break;
case 3:
if (mode == 0)
{
temp1 = sGpuBgConfigs2[3].bg_y >> 0x8;
SetGpuReg(REG_OFFSET_BG3VOFS, temp1);
}
else if (mode == 2)
{
temp1 = sGpuBgConfigs2[3].bg_y >> 0x10;
temp2 = sGpuBgConfigs2[3].bg_y & 0xFFFF;
SetGpuReg(REG_OFFSET_BG3Y_H, temp1);
SetGpuReg(REG_OFFSET_BG3Y_L, temp2);
}
break;
}
return sGpuBgConfigs2[bg].bg_y;