sceptillion
99 lines
1.5 KiB
ArmAsm
99 lines
1.5 KiB
ArmAsm
.include "asm/macros.inc"
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.include "constants/constants.inc"
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.syntax unified
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.text
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thumb_func_start sub_80A0DD8
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sub_80A0DD8: @ 80A0DD8
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push {lr}
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lsls r0, 24
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lsrs r2, r0, 24
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lsls r0, r2, 2
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adds r0, r2
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lsls r0, 3
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ldr r1, _080A0DFC @ =gUnknown_3005098
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adds r1, r0, r1
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movs r3, 0
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ldrsh r0, [r1, r3]
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cmp r0, 0x1
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beq _080A0E16
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cmp r0, 0x1
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bgt _080A0E00
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cmp r0, 0
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beq _080A0E06
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b _080A0E32
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.align 2, 0
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_080A0DFC: .4byte gUnknown_3005098
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_080A0E00:
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cmp r0, 0x2
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beq _080A0E2A
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b _080A0E32
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_080A0E06:
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ldrh r0, [r1, 0x2]
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adds r0, 0x1
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strh r0, [r1, 0x2]
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lsls r0, 16
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asrs r0, 16
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cmp r0, 0x4
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ble _080A0E32
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b _080A0E22
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_080A0E16:
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ldrh r0, [r1, 0x2]
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subs r0, 0x1
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strh r0, [r1, 0x2]
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lsls r0, 16
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cmp r0, 0
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bne _080A0E32
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_080A0E22:
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ldrh r0, [r1]
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adds r0, 0x1
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strh r0, [r1]
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b _080A0E32
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_080A0E2A:
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adds r0, r2, 0
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bl sub_8077508
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b _080A0E42
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_080A0E32:
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ldrb r1, [r1, 0x2]
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lsls r0, r1, 4
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orrs r0, r1
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lsls r0, 24
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lsrs r0, 24
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movs r1, 0
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bl sub_8001EC0
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_080A0E42:
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pop {r0}
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bx r0
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thumb_func_end sub_80A0DD8
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thumb_func_start sub_80A0E48
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sub_80A0E48: @ 80A0E48
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push {lr}
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movs r0, 0x48
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bl sub_80722CC
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ldr r0, _080A0E5C @ =sub_80A0DD8
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movs r1, 0x50
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bl sub_807741C
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pop {r0}
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bx r0
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.align 2, 0
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_080A0E5C: .4byte sub_80A0DD8
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thumb_func_end sub_80A0E48
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thumb_func_start sub_80A0E60
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sub_80A0E60: @ 80A0E60
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push {lr}
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ldr r0, _080A0E70 @ =sub_80A0DD8
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bl sub_8077650
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lsls r0, 24
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lsrs r0, 24
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pop {r1}
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bx r1
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.align 2, 0
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_080A0E70: .4byte sub_80A0DD8
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thumb_func_end sub_80A0E60
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.align 2, 0 @ Don't pad with nop.
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