nonmatching sub_800CF34
This commit is contained in:
PikalaxALT
438
src/link_rfu.c
438
src/link_rfu.c
@@ -68,7 +68,7 @@ u32 sub_800BEC0(void)
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void rfu_REQ_sendData_wrapper(u8 r2)
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{
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u8 val;
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if (!gUnknown_03007890->unk_00)
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if (!gUnknown_03007890[0].unk_00)
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{
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val = gUnknown_03004140.unk_02;
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r2 = 0;
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@@ -220,7 +220,7 @@ u8 sub_800C12C(u16 r6, u16 r8)
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sub_800D30C(0xF3, 0x01);
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return 2;
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}
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for (i = 0; i < gUnknown_03007890->unk_08; i++)
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for (i = 0; i < gUnknown_03007890[0].unk_08; i++)
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{
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tmp = &gUnknown_03007890[i];
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if (tmp->unk_14 == r6)
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@@ -228,7 +228,7 @@ u8 sub_800C12C(u16 r6, u16 r8)
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break;
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}
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}
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if (gUnknown_03007890->unk_08 == 0 || i == gUnknown_03007890->unk_08)
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if (gUnknown_03007890[0].unk_08 == 0 || i == gUnknown_03007890[0].unk_08)
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{
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gUnknown_03004140.unk_14 = 3;
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sub_800D30C(0xF3, 0x01);
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@@ -267,7 +267,7 @@ void sub_800C210(u8 a0)
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gUnknown_03004140.unk_34[i] = 0;
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}
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}
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i = gUnknown_03007890->unk_03 & a0;
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i = gUnknown_03007890[0].unk_03 & a0;
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if (i)
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{
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sub_800D334(i);
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@@ -336,8 +336,8 @@ void sub_800C27C(bool8 a0)
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case 16:
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_11;
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gUnknown_03004140.unk_05 = gUnknown_03004140.unk_12;
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sub_800D334(gUnknown_03007890->unk_03);
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gUnknown_03004140.unk_14 = gUnknown_03007890->unk_03;
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sub_800D334(gUnknown_03007890[0].unk_03);
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gUnknown_03004140.unk_14 = gUnknown_03007890[0].unk_03;
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sub_800D30C(0x33, 0x01);
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return;
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case 17:
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@@ -409,7 +409,7 @@ bool8 sub_800C36C(u16 a0)
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}
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sub_800D610();
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}
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if (gUnknown_03007890->unk_00 == 1)
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if (gUnknown_03007890[0].unk_00 == 1)
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{
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if (sp2)
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{
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@@ -540,7 +540,7 @@ void sub_800C54C(u32 a0)
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case 15:
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break;
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case 16:
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rfu_REQ_CHILD_startConnectRecovery(gUnknown_03007890->unk_03);
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rfu_REQ_CHILD_startConnectRecovery(gUnknown_03007890[0].unk_03);
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break;
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case 17:
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rfu_REQ_CHILD_pollConnectRecovery();
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@@ -563,7 +563,7 @@ void sub_800C54C(u32 a0)
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gUnknown_03004140.unk_0e = 0;
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}
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} while (gUnknown_03004140.unk_04 == 18 || gUnknown_03004140.unk_04 == 19);
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if (gUnknown_03007890->unk_00 != 1 || !sub_800C36C(0))
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if (gUnknown_03007890[0].unk_00 != 1 || !sub_800C36C(0))
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{
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sub_800CF34();
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sub_800D158();
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@@ -689,7 +689,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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{
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sub_800D30C(0x20, 0x01);
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}
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if (gUnknown_03004140.unk_0b && gUnknown_03004140.unk_1a != 1 && gUnknown_03007890->unk_08 == 4)
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if (gUnknown_03004140.unk_0b && gUnknown_03004140.unk_1a != 1 && gUnknown_03007890[0].unk_08 == 4)
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{
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rfu_REQ_endSearchParent();
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rfu_waitREQComplete();
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@@ -765,11 +765,11 @@ void sub_800C7B4(u16 r8, u16 r6)
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case 50:
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if (r6 == 0)
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{
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gUnknown_03004140.unk_14 = gUnknown_03007890->unk_03;
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gUnknown_03004140.unk_14 = gUnknown_03007890[0].unk_03;
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 17;
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for (gUnknown_03004140.unk_10 = 0; gUnknown_03004140.unk_10 < 4; gUnknown_03004140.unk_10 ++)
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{
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if ((gUnknown_03007890->unk_03 >> gUnknown_03004140.unk_10) & 1)
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if ((gUnknown_03007890[0].unk_03 >> gUnknown_03004140.unk_10) & 1)
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{
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break;
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}
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@@ -798,7 +798,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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else
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{
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
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sub_800D334(gUnknown_03007890->unk_03);
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sub_800D334(gUnknown_03007890[0].unk_03);
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gUnknown_03004140.unk_1e = 0x33;
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}
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gUnknown_03004140.unk_34[gUnknown_03004140.unk_10] = 0;
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@@ -832,7 +832,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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{
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
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sub_800D610();
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sub_800D334(gUnknown_03007890->unk_02 | gUnknown_03007890->unk_03);
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sub_800D334(gUnknown_03007890[0].unk_02 | gUnknown_03007890[0].unk_03);
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gUnknown_03004140.unk_14 = sp0;
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sub_800D30C(0x25, 0x01);
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}
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@@ -854,10 +854,10 @@ void sub_800C7B4(u16 r8, u16 r6)
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rfu_REQ_RFUStatus();
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rfu_waitREQComplete();
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rfu_getRFUStatus(&sp0);
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if (sp0 == 0 && gUnknown_03007890->unk_00 == 0)
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if (sp0 == 0 && gUnknown_03007890[0].unk_00 == 0)
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{
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stwiRecvBuffer = rfu_getSTWIRecvBuffer();
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stwiRecvBuffer[4] = gUnknown_03007890->unk_02;
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stwiRecvBuffer[4] = gUnknown_03007890[0].unk_02;
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stwiRecvBuffer[5] = 1;
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sub_800C36C(0x29);
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r6 = 0;
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@@ -897,7 +897,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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gUnknown_03004140.unk_00 &= ~gUnknown_03004140.unk_14;
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if (gUnknown_03004140.unk_07)
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{
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if (gUnknown_03007890->unk_00 == 0xFF)
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if (gUnknown_03007890[0].unk_00 == 0xFF)
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{
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if (gUnknown_03004140.unk_07 == 8)
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{
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@@ -912,7 +912,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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}
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}
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}
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if (gUnknown_03007890->unk_00 == 0xFF)
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if (gUnknown_03007890[0].unk_00 == 0xFF)
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{
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if (gUnknown_03004140.unk_04 == 0)
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{
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@@ -927,7 +927,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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break;
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case 38:
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sub_800D20C();
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if (gUnknown_03007890->unk_00 != 0xFF)
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if (gUnknown_03007890[0].unk_00 != 0xFF)
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{
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sub_800D30C(0x50, 0x00);
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}
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@@ -952,8 +952,8 @@ void sub_800C7B4(u16 r8, u16 r6)
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{
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if (r8 == 28 && r6 != 0 && gUnknown_03004140.unk_07 == 4)
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{
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gUnknown_03007890->unk_00 = 1;
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gUnknown_03007890->unk_02 = 15;
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gUnknown_03007890[0].unk_00 = 1;
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gUnknown_03007890[0].unk_02 = 15;
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sub_800D334(15);
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rfu_waitREQComplete();
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return;
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@@ -985,7 +985,7 @@ void sub_800CEB0(u16 r6)
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r7 = gUnknown_03004140.unk_0e;
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gUnknown_03004140.unk_0e = 0;
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gUnknown_03004140.unk_0f = 1;
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if (gUnknown_03007890->unk_00 == 0)
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if (gUnknown_03007890[0].unk_00 == 0)
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{
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sub_800C36C(r6);
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if (gUnknown_03004140.unk_02 != 1)
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@@ -1015,3 +1015,397 @@ void sub_800CEB0(u16 r6)
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gUnknown_03004140.unk_0f = 0;
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gUnknown_03004140.unk_0e = r7;
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}
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#ifdef NONMATCHING
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void sub_800CF34(void)
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{
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u8 flags;
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u8 sp0;
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u8 i;
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u8 r5;
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u8 r4;
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u16 *ptr;
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if (gUnknown_03004140.unk_04 == 5 || gUnknown_03004140.unk_04 == 6 || gUnknown_03004140.unk_04 == 7 || gUnknown_03004140.unk_04 == 8)
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{
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flags = ((gUnknown_03007890[0].unk_02 ^ gUnknown_03004140.unk_0c) & gUnknown_03007890[0].unk_02) & ~gUnknown_03007890[0].unk_07;
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gUnknown_03004140.unk_0c = gUnknown_03007890[0].unk_02;
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if (flags)
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{
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gUnknown_03004140.unk_14 = flags;
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sub_800D30C(0x10, 0x01);
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}
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sp0 = 0x00;
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for (i = 0; i < 4; i++)
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{
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r4 = 1 << i;
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r5 = 0x00;
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if (flags & r4)
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{
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gUnknown_03004140.unk_28[i] = gUnknown_03004140.unk_26;
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gUnknown_03004140.unk_24 |= r4;
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}
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else if (gUnknown_03004140.unk_24 & r4)
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{
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if (gUnknown_03007880[i]->unk_34 == 0x46)
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{
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if (gUnknown_03007880[i]->unk_61 == 1)
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{
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r5 = 0x02;
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for (ptr = gUnknown_03004140.unk_20; *ptr != 0xFFFF; ptr++)
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{
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if (*gUnknown_03007890[i].unk_18 == *ptr) // FIXME: Role of r0 and r1 is swapped
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{
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gUnknown_03004140.unk_00 |= r4;
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gUnknown_03004140.unk_01++;
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sp0 |= r4;
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r5 |= 0x01;
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break;
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}
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}
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if (!(r5 & 0x01))
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{
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r5 |= 0x04;
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}
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}
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}
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else if (--gUnknown_03004140.unk_28[i] == 0)
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{
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r5 = 0x06;
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}
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if (r5 & 0x02)
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{
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gUnknown_03004140.unk_24 &= ~r4;
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gUnknown_03004140.unk_28[i] = 0;
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rfu_clearSlot(0x08, i);
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}
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if (r5 & 0x04)
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{
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gUnknown_03004140.unk_0d |= r4;
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}
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}
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}
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if (sp0)
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{
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gUnknown_03004140.unk_14 = sp0;
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sub_800D30C(0x11, 0x01);
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}
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if (gUnknown_03004140.unk_0d)
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{
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r5 = 0x01;
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if (gUnknown_03007890[0].unk_06 && ((gUnknown_03004140.unk_03 & gUnknown_03004140.unk_00) != gUnknown_03004140.unk_00))
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{
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r5 = 0x00;
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}
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if (r5)
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{
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sub_800D334(gUnknown_03004140.unk_0d);
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gUnknown_03004140.unk_14 = gUnknown_03004140.unk_0d;
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gUnknown_03004140.unk_0d = 0;
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sub_800D30C(0x12, 0x01);
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}
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}
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if (gUnknown_03004140.unk_24 == 0 && gUnknown_03004140.unk_04 == 8)
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{
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if (gUnknown_03004140.unk_07 == 0)
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{
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
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sub_800D30C(0x14, 0x00);
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}
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else
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{
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if (gUnknown_03004140.unk_07 == 2)
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{
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gUnknown_03004140.unk_07 = 3;
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gUnknown_03004140.unk_04 = 9;
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}
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else
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{
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gUnknown_03004140.unk_07 = 1;
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gUnknown_03004140.unk_04 = 5;
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}
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if (gUnknown_03004140.unk_00)
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{
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gUnknown_03004140.unk_1a = 0;
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gUnknown_03004140.unk_07 = 8;
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gUnknown_03004140.unk_04 = 5;
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}
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}
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}
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}
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}
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#else
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__attribute__((naked)) void sub_800CF34(void)
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{
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asm_unified("\tpush {r4-r7,lr}\n"
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"\tmov r7, r10\n"
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"\tmov r6, r9\n"
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"\tmov r5, r8\n"
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"\tpush {r5-r7}\n"
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"\tsub sp, 0x8\n"
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"\tldr r1, =gUnknown_03004140\n"
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"\tldrb r0, [r1, 0x4]\n"
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"\tsubs r0, 0x5\n"
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"\tlsls r0, 24\n"
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"\tlsrs r0, 24\n"
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"\tadds r3, r1, 0\n"
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"\tcmp r0, 0x3\n"
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"\tbls _0800CF52\n"
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"\tb _0800D146_break\n"
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"_0800CF52:\n"
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"\tldr r0, =gUnknown_03007890\n"
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"\tldr r2, [r0]\n"
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"\tldrb r1, [r2, 0x2]\n"
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"\tldrb r0, [r3, 0xC]\n"
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"\tadds r4, r1, 0\n"
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"\teors r4, r0\n"
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"\tands r4, r1\n"
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"\tldrb r0, [r2, 0x7]\n"
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"\tbics r4, r0\n"
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"\tmov r8, r4\n"
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"\tstrb r1, [r3, 0xC]\n"
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"\tcmp r4, 0\n"
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"\tbeq _0800CF7A\n"
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"\tstrh r4, [r3, 0x14]\n"
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"\tmovs r0, 0x10\n"
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"\tmovs r1, 0x1\n"
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"\tstr r3, [sp, 0x4]\n"
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"\tbl sub_800D30C\n"
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"\tldr r3, [sp, 0x4]\n"
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"_0800CF7A:\n"
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"\tmovs r0, 0\n"
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"\tstr r0, [sp]\n"
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"\tmovs r6, 0\n"
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"\tadds r7, r3, 0\n"
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"\tmovs r1, 0x24\n"
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"\tadds r1, r3\n"
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"\tmov r9, r1\n"
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"_0800CF88:\n"
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"\tmovs r0, 0x80\n"
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"\tlsls r0, 17\n"
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"\tlsls r0, r6\n"
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"\tlsrs r4, r0, 24\n"
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"\tmovs r5, 0\n"
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"\tmov r0, r8\n"
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"\tands r0, r4\n"
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"\tcmp r0, 0\n"
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"\tbeq _0800CFDA\n"
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"\tlsls r1, r6, 1\n"
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"\tadds r0, r7, 0\n"
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"\tadds r0, 0x28\n"
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"\tadds r1, r0\n"
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"\tldrh r0, [r7, 0x26]\n"
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"\tstrh r0, [r1]\n"
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"\tmov r2, r9\n"
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"\tldrb r1, [r2]\n"
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"\tadds r0, r4, 0\n"
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"\torrs r0, r1\n"
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"\tstrb r0, [r2]\n"
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"\tadds r6, 0x1\n"
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"\tmov r10, r6\n"
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"\tb _0800D090\n"
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"\t.pool\n"
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"_0800CFC0:\n"
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"\tldrb r1, [r7]\n"
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"\tadds r0, r4, 0\n"
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"\torrs r0, r1\n"
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"\tstrb r0, [r7]\n"
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"\tldrb r0, [r7, 0x1]\n"
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"\tadds r0, 0x1\n"
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"\tstrb r0, [r7, 0x1]\n"
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"\tldr r0, [sp]\n"
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"\torrs r0, r4\n"
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"\tstr r0, [sp]\n"
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"\tmovs r0, 0x1\n"
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"\torrs r5, r0\n"
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"\tb _0800D024\n"
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"_0800CFDA:\n"
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"\tmov r1, r9\n"
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"\tldrb r0, [r1]\n"
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"\tands r0, r4\n"
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"\tadds r2, r6, 0x1\n"
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"\tmov r10, r2\n"
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"\tcmp r0, 0\n"
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"\tbeq _0800D090\n"
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"\tldr r0, =gUnknown_03007880\n"
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"\tlsls r1, r6, 2\n"
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"\tadds r1, r0\n"
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"\tldr r1, [r1]\n"
|
||||
"\tldrh r0, [r1, 0x34]\n"
|
||||
"\tcmp r0, 0x46\n"
|
||||
"\tbne _0800D040\n"
|
||||
"\tadds r0, r1, 0\n"
|
||||
"\tadds r0, 0x61\n"
|
||||
"\tldrb r0, [r0]\n"
|
||||
"\tcmp r0, 0x1\n"
|
||||
"\tbne _0800D058\n"
|
||||
"\tmovs r5, 0x2\n"
|
||||
"\tldr r3, [r3, 0x20]\n"
|
||||
"\tldrh r2, [r3]\n"
|
||||
"\tldr r0, =0x0000ffff\n"
|
||||
"\tcmp r2, r0\n"
|
||||
"\tbeq _0800D024\n"
|
||||
"\tldr r0, =gUnknown_03007890\n"
|
||||
"\tldr r0, [r0]\n"
|
||||
"\tlsls r1, r6, 5\n"
|
||||
"\tadds r0, r1\n"
|
||||
"\tldrh r0, [r0, 0x18]\n"
|
||||
"\tldr r1, =0x0000ffff\n"
|
||||
"_0800D018:\n"
|
||||
"\tcmp r0, r2\n"
|
||||
"\tbeq _0800CFC0\n"
|
||||
"\tadds r3, 0x2\n"
|
||||
"\tldrh r2, [r3]\n"
|
||||
"\tcmp r2, r1\n"
|
||||
"\tbne _0800D018\n"
|
||||
"_0800D024:\n"
|
||||
"\tmovs r0, 0x1\n"
|
||||
"\tands r0, r5\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _0800D058\n"
|
||||
"\tmovs r0, 0x4\n"
|
||||
"\torrs r5, r0\n"
|
||||
"\tb _0800D058\n"
|
||||
"\t.pool\n"
|
||||
"_0800D040:\n"
|
||||
"\tlsls r1, r6, 1\n"
|
||||
"\tadds r0, r3, 0\n"
|
||||
"\tadds r0, 0x28\n"
|
||||
"\tadds r1, r0\n"
|
||||
"\tldrh r0, [r1]\n"
|
||||
"\tsubs r0, 0x1\n"
|
||||
"\tstrh r0, [r1]\n"
|
||||
"\tldr r1, =0x0000ffff\n"
|
||||
"\tands r0, r1\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _0800D058\n"
|
||||
"\tmovs r5, 0x6\n"
|
||||
"_0800D058:\n"
|
||||
"\tmovs r0, 0x2\n"
|
||||
"\tands r0, r5\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D07E\n"
|
||||
"\tmov r2, r9\n"
|
||||
"\tldrb r0, [r2]\n"
|
||||
"\tbics r0, r4\n"
|
||||
"\tmovs r2, 0\n"
|
||||
"\tmov r1, r9\n"
|
||||
"\tstrb r0, [r1]\n"
|
||||
"\tlsls r0, r6, 1\n"
|
||||
"\tadds r1, r7, 0\n"
|
||||
"\tadds r1, 0x28\n"
|
||||
"\tadds r0, r1\n"
|
||||
"\tstrh r2, [r0]\n"
|
||||
"\tmovs r0, 0x8\n"
|
||||
"\tadds r1, r6, 0\n"
|
||||
"\tbl rfu_clearSlot\n"
|
||||
"_0800D07E:\n"
|
||||
"\tmovs r0, 0x4\n"
|
||||
"\tands r5, r0\n"
|
||||
"\tldr r3, =gUnknown_03004140\n"
|
||||
"\tcmp r5, 0\n"
|
||||
"\tbeq _0800D090\n"
|
||||
"\tldrb r1, [r7, 0xD]\n"
|
||||
"\tadds r0, r4, 0\n"
|
||||
"\torrs r0, r1\n"
|
||||
"\tstrb r0, [r7, 0xD]\n"
|
||||
"_0800D090:\n"
|
||||
"\tmov r2, r10\n"
|
||||
"\tlsls r0, r2, 24\n"
|
||||
"\tlsrs r6, r0, 24\n"
|
||||
"\tcmp r6, 0x3\n"
|
||||
"\tbhi _0800D09C\n"
|
||||
"\tb _0800CF88\n"
|
||||
"_0800D09C:\n"
|
||||
"\tldr r4, [sp]\n"
|
||||
"\tcmp r4, 0\n"
|
||||
"\tbeq _0800D0AE\n"
|
||||
"\tldr r0, =gUnknown_03004140\n"
|
||||
"\tstrh r4, [r0, 0x14]\n"
|
||||
"\tmovs r0, 0x11\n"
|
||||
"\tmovs r1, 0x1\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"_0800D0AE:\n"
|
||||
"\tldr r1, =gUnknown_03004140\n"
|
||||
"\tldrb r0, [r1, 0xD]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D0EA\n"
|
||||
"\tmovs r5, 0x1\n"
|
||||
"\tldr r0, =gUnknown_03007890\n"
|
||||
"\tldr r0, [r0]\n"
|
||||
"\tldrb r0, [r0, 0x6]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D0CE\n"
|
||||
"\tldrb r0, [r1, 0x3]\n"
|
||||
"\tldrb r1, [r1]\n"
|
||||
"\tands r0, r1\n"
|
||||
"\tcmp r0, r1\n"
|
||||
"\tbeq _0800D0CE\n"
|
||||
"\tmovs r5, 0\n"
|
||||
"_0800D0CE:\n"
|
||||
"\tcmp r5, 0\n"
|
||||
"\tbeq _0800D0EA\n"
|
||||
"\tldr r4, =gUnknown_03004140\n"
|
||||
"\tldrb r0, [r4, 0xD]\n"
|
||||
"\tbl sub_800D334\n"
|
||||
"\tldrb r0, [r4, 0xD]\n"
|
||||
"\tmovs r1, 0\n"
|
||||
"\tstrh r0, [r4, 0x14]\n"
|
||||
"\tstrb r1, [r4, 0xD]\n"
|
||||
"\tmovs r0, 0x12\n"
|
||||
"\tmovs r1, 0x1\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"_0800D0EA:\n"
|
||||
"\tldr r0, =gUnknown_03004140\n"
|
||||
"\tadds r1, r0, 0\n"
|
||||
"\tadds r1, 0x24\n"
|
||||
"\tldrb r1, [r1]\n"
|
||||
"\tadds r3, r0, 0\n"
|
||||
"\tcmp r1, 0\n"
|
||||
"\tbne _0800D146_break\n"
|
||||
"\tldrb r0, [r3, 0x4]\n"
|
||||
"\tcmp r0, 0x8\n"
|
||||
"\tbne _0800D146_break\n"
|
||||
"\tldrb r0, [r3, 0x7]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _0800D120\n"
|
||||
"\tstrb r0, [r3, 0x5]\n"
|
||||
"\tstrb r0, [r3, 0x4]\n"
|
||||
"\tmovs r0, 0x14\n"
|
||||
"\tmovs r1, 0\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"\tb _0800D146_break\n"
|
||||
"\t.pool\n"
|
||||
"_0800D120:\n"
|
||||
"\tcmp r0, 0x2\n"
|
||||
"\tbne _0800D12C\n"
|
||||
"\tmovs r0, 0x3\n"
|
||||
"\tstrb r0, [r3, 0x7]\n"
|
||||
"\tmovs r0, 0x9\n"
|
||||
"\tb _0800D132\n"
|
||||
"_0800D12C:\n"
|
||||
"\tmovs r0, 0x1\n"
|
||||
"\tstrb r0, [r3, 0x7]\n"
|
||||
"\tmovs r0, 0x5\n"
|
||||
"_0800D132:\n"
|
||||
"\tstrb r0, [r3, 0x4]\n"
|
||||
"\tldrb r0, [r3]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D146_break\n"
|
||||
"\tmovs r0, 0\n"
|
||||
"\tstrh r0, [r3, 0x1A]\n"
|
||||
"\tmovs r0, 0x8\n"
|
||||
"\tstrb r0, [r3, 0x7]\n"
|
||||
"\tmovs r0, 0x5\n"
|
||||
"\tstrb r0, [r3, 0x4]\n"
|
||||
"_0800D146_break:\n"
|
||||
"\tadd sp, 0x8\n"
|
||||
"\tpop {r3-r5}\n"
|
||||
"\tmov r8, r3\n"
|
||||
"\tmov r9, r4\n"
|
||||
"\tmov r10, r5\n"
|
||||
"\tpop {r4-r7}\n"
|
||||
"\tpop {r0}\n"
|
||||
"\tbx r0");
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user