3 fails and 2 are not attempted
This commit is contained in:
jiangzhengwenjz
+602
-1
@@ -8,7 +8,6 @@
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#include "new_menu_helpers.h"
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#include "sound.h"
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#include "malloc.h"
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#include "sprite.h"
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#include "scanline_effect.h"
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#include "bg.h"
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#include "gpu_regs.h"
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@@ -28,6 +27,7 @@
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#include "battle_transition.h"
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#include "battle_2.h"
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#include "battle.h"
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#include "global.fieldmap.h"
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typedef struct Task Task;
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typedef struct {
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@@ -92,6 +92,12 @@ u8 TeachyTvGrassAnimationCheckIfNeedsToGenerateGrassObj(s16 x, s16 y);
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void TeachyTvGrassAnimationObjCallback(struct Sprite *sprite);
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void TeachyTvRestorePlayerPartyCallback();
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void TeachyTvPreBattleAnimAndSetBattleCallback(u8 taskId);
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void TeachyTvLoadMapTilesetToBuffer(struct Tileset *ts, u8 *dstBuffer, u16 size);
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void TeachyTvPushBackNewMapPalIndexArrayEntry(struct MapData *mStruct, u16 *buf1, u8 *palIndexArray, u16 mapEntry, u16 offset);
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void TeachyTvComputeMapTilesFromTilesetAndMetaTiles(u16 *metaTilesArray, u8 *blockBuf, u8 *tileset);
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void TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(u8 *blockBuf, u8 *tileset, u8 metaTile);
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u16 TeachyTvComputePalIndexArrayEntryByMetaTile(u8 *palIndexArrayBuf, u16 metaTile);
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void TeachyTvLoadMapPalette(struct MapData *mStruct, u8 *palIndexArray);
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extern void VblankHblankHandlerSetZero();
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extern void sub_812B1E0(u16);
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@@ -1026,3 +1032,598 @@ void TeachyTvRestorePlayerPartyCallback()
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sub_815ABFC();
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}
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NAKED
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void TeachyTvLoadBg3Map(void *buffer)
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{
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asm_unified("\n\
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push {r4-r7,lr}\n\
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mov r7, r10\n\
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mov r6, r9\n\
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mov r5, r8\n\
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push {r5-r7}\n\
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sub sp, 0x1C\n\
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str r0, [sp, 0x4]\n\
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movs r0, 0\n\
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str r0, [sp, 0x10]\n\
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ldr r1, _0815BE1C @ =Route1_Layout\n\
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mov r8, r1\n\
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movs r0, 0x80\n\
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lsls r0, 4\n\
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bl AllocZeroed\n\
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adds r6, r0, 0\n\
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movs r0, 0x80\n\
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lsls r0, 8\n\
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bl AllocZeroed\n\
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str r0, [sp, 0x8]\n\
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movs r0, 0x10\n\
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bl Alloc\n\
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str r0, [sp, 0xC]\n\
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movs r1, 0xFF\n\
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movs r2, 0x10\n\
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bl memset\n\
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mov r2, r8\n\
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ldr r0, [r2, 0x10]\n\
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movs r2, 0xA0\n\
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lsls r2, 2\n\
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ldr r1, [sp, 0x8]\n\
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bl TeachyTvLoadMapTilesetToBuffer\n\
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mov r3, r8\n\
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ldr r0, [r3, 0x14]\n\
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ldr r2, [sp, 0x8]\n\
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movs r3, 0xA0\n\
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lsls r3, 7\n\
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adds r1, r2, r3\n\
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movs r2, 0xC0\n\
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lsls r2, 1\n\
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bl TeachyTvLoadMapTilesetToBuffer\n\
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movs r4, 0\n\
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_0815BDDE:\n\
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movs r2, 0\n\
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adds r0, r4, 0x6\n\
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str r0, [sp, 0x18]\n\
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lsls r1, r4, 4\n\
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mov r10, r1\n\
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lsls r3, r4, 6\n\
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mov r9, r3\n\
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adds r4, 0x1\n\
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str r4, [sp, 0x14]\n\
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_0815BDF0:\n\
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mov r1, r8\n\
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ldr r0, [r1]\n\
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ldr r3, [sp, 0x18]\n\
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muls r0, r3\n\
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ldr r1, [r1, 0xC]\n\
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adds r0, r2, r0\n\
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lsls r0, 1\n\
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adds r0, r1\n\
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ldrh r1, [r0, 0x10]\n\
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ldr r3, _0815BE20 @ =0x000003ff\n\
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adds r0, r3, 0\n\
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adds r4, r0, 0\n\
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ands r4, r1\n\
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movs r3, 0\n\
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mov r0, r10\n\
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adds r1, r0, r2\n\
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lsls r5, r2, 1\n\
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adds r7, r2, 0x1\n\
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cmp r3, r1\n\
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bge _0815BE3C\n\
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ldrh r0, [r6]\n\
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b _0815BE34\n\
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.align 2, 0\n\
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_0815BE1C: .4byte Route1_Layout\n\
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_0815BE20: .4byte 0x000003ff\n\
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_0815BE24:\n\
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adds r0, r3, 0x1\n\
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lsls r0, 16\n\
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lsrs r3, r0, 16\n\
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cmp r3, r1\n\
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bge _0815BE3C\n\
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lsls r0, r3, 1\n\
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adds r0, r6\n\
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ldrh r0, [r0]\n\
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_0815BE34:\n\
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cmp r0, 0\n\
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beq _0815BE46\n\
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cmp r0, r4\n\
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bne _0815BE24\n\
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_0815BE3C:\n\
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lsls r0, r3, 1\n\
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adds r0, r6\n\
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ldrh r0, [r0]\n\
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cmp r0, 0\n\
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bne _0815BE56\n\
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_0815BE46:\n\
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lsls r0, r3, 1\n\
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adds r0, r6\n\
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strh r4, [r0]\n\
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ldr r0, [sp, 0x10]\n\
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adds r0, 0x1\n\
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lsls r0, 16\n\
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lsrs r0, 16\n\
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str r0, [sp, 0x10]\n\
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_0815BE56:\n\
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mov r2, r9\n\
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adds r1, r2, r5\n\
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lsls r1, 1\n\
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ldr r0, [sp, 0x4]\n\
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adds r1, r0, r1\n\
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str r3, [sp]\n\
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mov r0, r8\n\
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ldr r2, [sp, 0xC]\n\
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adds r3, r4, 0\n\
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bl TeachyTvPushBackNewMapPalIndexArrayEntry\n\
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lsls r0, r7, 16\n\
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lsrs r2, r0, 16\n\
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cmp r2, 0xF\n\
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bls _0815BDF0\n\
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ldr r1, [sp, 0x14]\n\
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lsls r0, r1, 16\n\
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lsrs r4, r0, 16\n\
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cmp r4, 0x8\n\
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bls _0815BDDE\n\
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ldr r2, [sp, 0x10]\n\
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lsls r0, r2, 7\n\
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bl Alloc\n\
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adds r7, r0, 0\n\
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movs r0, 0x80\n\
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bl Alloc\n\
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adds r5, r0, 0\n\
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movs r4, 0\n\
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ldr r3, [sp, 0x10]\n\
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lsls r3, 23\n\
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mov r9, r3\n\
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ldr r0, [sp, 0x10]\n\
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cmp r4, r0\n\
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bcs _0815BF00\n\
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ldr r1, _0815BECC @ =0x0000027f\n\
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mov r10, r1\n\
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_0815BEA2:\n\
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adds r0, r5, 0\n\
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movs r1, 0\n\
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movs r2, 0x80\n\
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bl memset\n\
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lsls r0, r4, 1\n\
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adds r1, r0, r6\n\
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ldrh r0, [r1]\n\
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cmp r0, r10\n\
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bhi _0815BED0\n\
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mov r2, r8\n\
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ldr r0, [r2, 0x10]\n\
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ldrh r1, [r1]\n\
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lsls r1, 4\n\
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ldr r0, [r0, 0xC]\n\
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adds r0, r1\n\
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adds r1, r5, 0\n\
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ldr r2, [sp, 0x8]\n\
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bl TeachyTvComputeMapTilesFromTilesetAndMetaTiles\n\
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b _0815BEE8\n\
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.align 2, 0\n\
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_0815BECC: .4byte 0x0000027f\n\
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_0815BED0:\n\
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mov r3, r8\n\
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ldr r0, [r3, 0x14]\n\
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ldrh r1, [r1]\n\
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ldr r2, _0815BF44 @ =0xfffffd80\n\
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adds r1, r2\n\
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lsls r1, 4\n\
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ldr r0, [r0, 0xC]\n\
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adds r0, r1\n\
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adds r1, r5, 0\n\
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ldr r2, [sp, 0x8]\n\
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bl TeachyTvComputeMapTilesFromTilesetAndMetaTiles\n\
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_0815BEE8:\n\
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lsls r1, r4, 7\n\
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adds r1, r7, r1\n\
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adds r0, r5, 0\n\
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movs r2, 0x20\n\
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bl CpuFastSet\n\
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adds r0, r4, 0x1\n\
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lsls r0, 16\n\
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lsrs r4, r0, 16\n\
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ldr r3, [sp, 0x10]\n\
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cmp r4, r3\n\
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bcc _0815BEA2\n\
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_0815BF00:\n\
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mov r0, r9\n\
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lsrs r2, r0, 16\n\
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movs r0, 0x3\n\
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adds r1, r7, 0\n\
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movs r3, 0\n\
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bl LoadBgTiles\n\
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mov r0, r8\n\
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ldr r1, [sp, 0xC]\n\
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bl TeachyTvLoadMapPalette\n\
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adds r0, r5, 0\n\
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bl Free\n\
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adds r0, r7, 0\n\
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bl Free\n\
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ldr r0, [sp, 0xC]\n\
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bl Free\n\
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ldr r0, [sp, 0x8]\n\
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bl Free\n\
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adds r0, r6, 0\n\
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bl Free\n\
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add sp, 0x1C\n\
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pop {r3-r5}\n\
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mov r8, r3\n\
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mov r9, r4\n\
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mov r10, r5\n\
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pop {r4-r7}\n\
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pop {r0}\n\
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bx r0\n\
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.align 2, 0\n\
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_0815BF44: .4byte 0xfffffd80\n\
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");
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}
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void TeachyTvLoadMapTilesetToBuffer(struct Tileset *ts, u8 *dstBuffer, u16 size)
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{
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if ( ts )
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{
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if ( !ts->isCompressed )
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CpuFastSet(ts->tiles, dstBuffer, 8 * size);
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else
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LZDecompressWram(ts->tiles, dstBuffer);
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}
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}
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#ifdef NONMATCHING
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void TeachyTvPushBackNewMapPalIndexArrayEntry(struct MapData *mStruct, u16 *buf1, u8 *palIndexArray, u16 mapEntry, u16 offset)
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{
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// weird, seems easy but no match
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struct Tileset *ts;
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u16 *metaTileEntryAddr;
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int temp = mapEntry;
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if ( temp <= 0x27Fu )
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{
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ts = mStruct->primaryTileset;
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}
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else
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{
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ts = mStruct->secondaryTileset;
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temp = mapEntry - 0x280;
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}
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metaTileEntryAddr = &((u16*)(ts->metatiles))[8 * temp];
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buf1[0] = (TeachyTvComputePalIndexArrayEntryByMetaTile(palIndexArray, metaTileEntryAddr[0]) << 12) + 4 * offset;
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buf1[1] = (TeachyTvComputePalIndexArrayEntryByMetaTile(palIndexArray, metaTileEntryAddr[1]) << 12) + 4 * offset + 1;
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buf1[0x20] = (TeachyTvComputePalIndexArrayEntryByMetaTile(palIndexArray, metaTileEntryAddr[2]) << 12) + 4 * offset + 2;
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buf1[0x21] = (TeachyTvComputePalIndexArrayEntryByMetaTile(palIndexArray, metaTileEntryAddr[3]) << 12) + 4 * offset + 3;
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}
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#else
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NAKED
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void TeachyTvPushBackNewMapPalIndexArrayEntry(struct MapData *mStruct, u16 *buf1, u8 *palIndexArray, u16 mapEntry, u16 offset)
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{
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asm_unified("\n\
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push {r4-r7,lr}\n\
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adds r5, r0, 0\n\
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adds r7, r1, 0\n\
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adds r6, r2, 0\n\
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ldr r0, [sp, 0x14]\n\
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lsls r3, 16\n\
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lsrs r1, r3, 16\n\
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lsls r0, 16\n\
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lsrs r4, r0, 16\n\
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ldr r0, _0815BF8C @ =0x0000027f\n\
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cmp r1, r0\n\
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bhi _0815BF90\n\
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ldr r0, [r5, 0x10]\n\
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b _0815BF96\n\
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.align 2, 0\n\
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_0815BF8C: .4byte 0x0000027f\n\
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_0815BF90:\n\
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ldr r0, [r5, 0x14]\n\
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ldr r2, _0815BFEC @ =0xfffffd80\n\
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adds r1, r2\n\
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_0815BF96:\n\
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lsls r1, 4\n\
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ldr r0, [r0, 0xC]\n\
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adds r5, r0, r1\n\
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ldrh r1, [r5]\n\
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adds r0, r6, 0\n\
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bl TeachyTvComputePalIndexArrayEntryByMetaTile\n\
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lsls r0, 12\n\
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lsls r4, 2\n\
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adds r0, r4\n\
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strh r0, [r7]\n\
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ldrh r1, [r5, 0x2]\n\
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||||
adds r0, r6, 0\n\
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bl TeachyTvComputePalIndexArrayEntryByMetaTile\n\
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lsls r0, 12\n\
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adds r0, r4\n\
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||||
adds r0, 0x1\n\
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||||
strh r0, [r7, 0x2]\n\
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||||
ldrh r1, [r5, 0x4]\n\
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||||
adds r0, r6, 0\n\
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||||
bl TeachyTvComputePalIndexArrayEntryByMetaTile\n\
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||||
adds r1, r7, 0\n\
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||||
adds r1, 0x40\n\
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||||
lsls r0, 12\n\
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||||
adds r0, r4\n\
|
||||
adds r0, 0x2\n\
|
||||
strh r0, [r1]\n\
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||||
ldrh r1, [r5, 0x6]\n\
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||||
adds r0, r6, 0\n\
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||||
bl TeachyTvComputePalIndexArrayEntryByMetaTile\n\
|
||||
adds r1, r7, 0\n\
|
||||
adds r1, 0x42\n\
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||||
lsls r0, 12\n\
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||||
adds r0, r4\n\
|
||||
adds r0, 0x3\n\
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||||
strh r0, [r1]\n\
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||||
pop {r4-r7}\n\
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||||
pop {r0}\n\
|
||||
bx r0\n\
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||||
.align 2, 0\n\
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||||
_0815BFEC: .4byte 0xfffffd80\n\
|
||||
");
|
||||
}
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||||
#endif
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||||
|
||||
void TeachyTvComputeMapTilesFromTilesetAndMetaTiles(u16 *metaTilesArray, u8 *blockBuf, u8 *tileset)
|
||||
{
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TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(
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||||
blockBuf,
|
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&tileset[0x20 * (*metaTilesArray & 0x3FF)],
|
||||
(*metaTilesArray >> 10) & 3);
|
||||
TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf, &tileset[0x20 * (metaTilesArray[4] & 0x3FF)], (metaTilesArray[4] >> 10) & 3);
|
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TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf + 0x20, &tileset[0x20 * (metaTilesArray[1] & 0x3FF)], (metaTilesArray[1] >> 10) & 3);
|
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TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf + 0x20, &tileset[0x20 * (metaTilesArray[5] & 0x3FF)], (metaTilesArray[5] >> 10) & 3);
|
||||
TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf + 0x40, &tileset[0x20 * (metaTilesArray[2] & 0x3FF)], (metaTilesArray[2] >> 10) & 3);
|
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TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf + 0x40, &tileset[0x20 * (metaTilesArray[6] & 0x3FF)], (metaTilesArray[6] >> 10) & 3);
|
||||
blockBuf += 0x60;
|
||||
TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf, &tileset[0x20 * (metaTilesArray[3] & 0x3FF)], (metaTilesArray[3] >> 10) & 3);
|
||||
TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(blockBuf, &tileset[0x20 * (metaTilesArray[7] & 0x3FF)], (metaTilesArray[7] >> 10) & 3);
|
||||
}
|
||||
|
||||
NAKED
|
||||
void TeachyTvComputeSingleMapTileBlockFromTilesetAndMetaTiles(u8 *blockBuf, u8 *tileset, u8 metaTile)
|
||||
{
|
||||
asm_unified("\n\
|
||||
push {r4-r7,lr}\n\
|
||||
mov r7, r10\n\
|
||||
mov r6, r9\n\
|
||||
mov r5, r8\n\
|
||||
push {r5-r7}\n\
|
||||
sub sp, 0x4\n\
|
||||
mov r9, r0\n\
|
||||
adds r4, r1, 0\n\
|
||||
lsls r2, 24\n\
|
||||
lsrs r2, 24\n\
|
||||
mov r10, r2\n\
|
||||
movs r0, 0x20\n\
|
||||
bl AllocZeroed\n\
|
||||
adds r6, r0, 0\n\
|
||||
movs r0, 0x20\n\
|
||||
bl AllocZeroed\n\
|
||||
str r0, [sp]\n\
|
||||
adds r0, r4, 0\n\
|
||||
adds r1, r6, 0\n\
|
||||
movs r2, 0x8\n\
|
||||
bl CpuFastSet\n\
|
||||
movs r0, 0x1\n\
|
||||
mov r1, r10\n\
|
||||
ands r0, r1\n\
|
||||
cmp r0, 0\n\
|
||||
beq _0815C15A\n\
|
||||
movs r5, 0\n\
|
||||
movs r7, 0xF\n\
|
||||
mov r12, r7\n\
|
||||
movs r0, 0xF0\n\
|
||||
mov r8, r0\n\
|
||||
_0815C118:\n\
|
||||
movs r3, 0\n\
|
||||
lsls r4, r5, 2\n\
|
||||
_0815C11C:\n\
|
||||
subs r0, r3, 0x3\n\
|
||||
subs r0, r4, r0\n\
|
||||
adds r0, r6, r0\n\
|
||||
ldrb r1, [r0]\n\
|
||||
adds r2, r4, r3\n\
|
||||
ldr r7, [sp]\n\
|
||||
adds r2, r7, r2\n\
|
||||
adds r0, r1, 0\n\
|
||||
mov r7, r12\n\
|
||||
ands r0, r7\n\
|
||||
lsls r0, 4\n\
|
||||
mov r7, r8\n\
|
||||
ands r1, r7\n\
|
||||
lsrs r1, 4\n\
|
||||
adds r0, r1\n\
|
||||
strb r0, [r2]\n\
|
||||
adds r0, r3, 0x1\n\
|
||||
lsls r0, 24\n\
|
||||
lsrs r3, r0, 24\n\
|
||||
cmp r3, 0x3\n\
|
||||
bls _0815C11C\n\
|
||||
adds r0, r5, 0x1\n\
|
||||
lsls r0, 24\n\
|
||||
lsrs r5, r0, 24\n\
|
||||
cmp r5, 0x7\n\
|
||||
bls _0815C118\n\
|
||||
ldr r0, [sp]\n\
|
||||
adds r1, r6, 0\n\
|
||||
movs r2, 0x8\n\
|
||||
bl CpuFastSet\n\
|
||||
_0815C15A:\n\
|
||||
movs r0, 0x2\n\
|
||||
mov r1, r10\n\
|
||||
ands r0, r1\n\
|
||||
cmp r0, 0\n\
|
||||
beq _0815C18E\n\
|
||||
movs r5, 0\n\
|
||||
_0815C166:\n\
|
||||
lsls r0, r5, 2\n\
|
||||
ldr r7, [sp]\n\
|
||||
adds r0, r7\n\
|
||||
movs r1, 0x7\n\
|
||||
subs r1, r5\n\
|
||||
lsls r1, 2\n\
|
||||
adds r1, r6\n\
|
||||
movs r2, 0x4\n\
|
||||
bl memcpy\n\
|
||||
adds r0, r5, 0x1\n\
|
||||
lsls r0, 24\n\
|
||||
lsrs r5, r0, 24\n\
|
||||
cmp r5, 0x7\n\
|
||||
bls _0815C166\n\
|
||||
ldr r0, [sp]\n\
|
||||
adds r1, r6, 0\n\
|
||||
movs r2, 0x8\n\
|
||||
bl CpuFastSet\n\
|
||||
_0815C18E:\n\
|
||||
movs r5, 0\n\
|
||||
movs r0, 0xF0\n\
|
||||
mov r8, r0\n\
|
||||
movs r1, 0xF\n\
|
||||
mov r12, r1\n\
|
||||
_0815C198:\n\
|
||||
adds r4, r6, r5\n\
|
||||
ldrb r0, [r4]\n\
|
||||
mov r3, r8\n\
|
||||
ands r3, r0\n\
|
||||
cmp r3, 0\n\
|
||||
beq _0815C1B2\n\
|
||||
mov r7, r9\n\
|
||||
adds r2, r7, r5\n\
|
||||
ldrb r1, [r2]\n\
|
||||
mov r0, r12\n\
|
||||
ands r0, r1\n\
|
||||
adds r0, r3\n\
|
||||
strb r0, [r2]\n\
|
||||
_0815C1B2:\n\
|
||||
ldrb r0, [r4]\n\
|
||||
mov r3, r12\n\
|
||||
ands r3, r0\n\
|
||||
cmp r3, 0\n\
|
||||
beq _0815C1CA\n\
|
||||
mov r0, r9\n\
|
||||
adds r2, r0, r5\n\
|
||||
ldrb r1, [r2]\n\
|
||||
mov r0, r8\n\
|
||||
ands r0, r1\n\
|
||||
adds r0, r3\n\
|
||||
strb r0, [r2]\n\
|
||||
_0815C1CA:\n\
|
||||
adds r0, r5, 0x1\n\
|
||||
lsls r0, 24\n\
|
||||
lsrs r5, r0, 24\n\
|
||||
cmp r5, 0x1F\n\
|
||||
bls _0815C198\n\
|
||||
ldr r0, [sp]\n\
|
||||
bl Free\n\
|
||||
adds r0, r6, 0\n\
|
||||
bl Free\n\
|
||||
add sp, 0x4\n\
|
||||
pop {r3-r5}\n\
|
||||
mov r8, r3\n\
|
||||
mov r9, r4\n\
|
||||
mov r10, r5\n\
|
||||
pop {r4-r7}\n\
|
||||
pop {r0}\n\
|
||||
bx r0\n\
|
||||
");
|
||||
}
|
||||
|
||||
u16 TeachyTvComputePalIndexArrayEntryByMetaTile(u8 *palIndexArrayBuf, u16 metaTile)
|
||||
{
|
||||
u32 pal;
|
||||
u32 counter;
|
||||
int firstEntry;
|
||||
int temp;
|
||||
|
||||
pal = (u32)(metaTile << 16) >> 28;
|
||||
counter = 0;
|
||||
firstEntry = *palIndexArrayBuf;
|
||||
if ( firstEntry != pal )
|
||||
{
|
||||
if ( firstEntry == 0xFF )
|
||||
{
|
||||
*palIndexArrayBuf = pal;
|
||||
}
|
||||
else
|
||||
{
|
||||
while ( 1 )
|
||||
{
|
||||
counter = ((counter + 1) << 0x10) >> 0x10;
|
||||
if ( counter > 0xF )
|
||||
break;
|
||||
temp = palIndexArrayBuf[counter];
|
||||
if ( temp == pal )
|
||||
break;
|
||||
if ( temp == 0xFF )
|
||||
{
|
||||
palIndexArrayBuf[counter] = pal;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (0xF - counter) & 0xFFFF;
|
||||
}
|
||||
|
||||
#define NONMATCHING
|
||||
#ifdef NONMATCHING
|
||||
void TeachyTvLoadMapPalette(struct MapData *mStruct, u8 *palIndexArray)
|
||||
{
|
||||
u8 counter, v3;
|
||||
struct Tileset *ts;
|
||||
|
||||
for (counter = 0; counter < 0xF && palIndexArray[counter] != 0xFF; counter++)
|
||||
{
|
||||
if ( palIndexArray[counter] > 6u )
|
||||
ts = mStruct->secondaryTileset;
|
||||
else
|
||||
ts = mStruct->primaryTileset;
|
||||
LoadPalette((u8 *)ts->palettes + 0x20 * palIndexArray[counter], 0x10 * (0xF - counter), 0x20u);
|
||||
}
|
||||
}
|
||||
#else
|
||||
NAKED
|
||||
void TeachyTvLoadMapPalette(struct MapData *mStruct, u8 *palIndexArray)
|
||||
{
|
||||
asm_unified("\n\
|
||||
push {r4-r6,lr}\n\
|
||||
adds r6, r0, 0\n\
|
||||
adds r5, r1, 0\n\
|
||||
movs r4, 0\n\
|
||||
ldrb r0, [r5]\n\
|
||||
cmp r0, 0xFF\n\
|
||||
beq _0815C274\n\
|
||||
_0815C23E:\n\
|
||||
adds r1, r5, r4\n\
|
||||
ldrb r0, [r1]\n\
|
||||
cmp r0, 0x6\n\
|
||||
bls _0815C24A\n\
|
||||
ldr r0, [r6, 0x14]\n\
|
||||
b _0815C24C\n\
|
||||
_0815C24A:\n\
|
||||
ldr r0, [r6, 0x10]\n\
|
||||
_0815C24C:\n\
|
||||
ldrb r1, [r1]\n\
|
||||
lsls r1, 5\n\
|
||||
ldr r0, [r0, 0x8]\n\
|
||||
adds r0, r1\n\
|
||||
movs r1, 0xF\n\
|
||||
subs r1, r4\n\
|
||||
lsls r1, 20\n\
|
||||
lsrs r1, 16\n\
|
||||
movs r2, 0x20\n\
|
||||
bl LoadPalette\n\
|
||||
adds r0, r4, 0x1\n\
|
||||
lsls r0, 24\n\
|
||||
lsrs r4, r0, 24\n\
|
||||
cmp r4, 0xF\n\
|
||||
bhi _0815C274\n\
|
||||
adds r0, r5, r4\n\
|
||||
ldrb r0, [r0]\n\
|
||||
cmp r0, 0xFF\n\
|
||||
bne _0815C23E\n\
|
||||
_0815C274:\n\
|
||||
pop {r4-r6}\n\
|
||||
pop {r0}\n\
|
||||
bx r0\n\
|
||||
");
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user